( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation.

, , , , , и . PECCS, стр. 450-458. SciTePress, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

A H M Belayeth Hussain

A H M Belayeth Hussain

Wafaa M H A Zidan

A M Otto

Rabia Jafri

 

Другие публикации лиц с тем же именем

Exploring Spiking Neural Network on Coarse-Grain Reconfigurable Architectures., , , , , , , , и . MES, стр. 64-67. ACM, (2014)RuRot: Run-time rotatable-expandable partitions for efficient mapping in CGRAs., , , , , , , и . ICSAMOS, стр. 233-241. IEEE, (2014)Implementation and evaluation of configuration scrubbing on CGRAs: A case study., , , , , и . ISSoC, стр. 1-8. IEEE, (2013)Compression Based Efficient and Agile Configuration Mechanism for Coarse Grained Reconfigurable Architectures., , , , и . IPDPS Workshops, стр. 290-293. IEEE, (2011)NeuroCGRA: A CGRA with support for neural networks., , , , , , и . HPCS, стр. 506-511. IEEE, (2014)Can a reconfigurable architecture beat ASIC as a CNN accelerator?, , и . SAMOS, стр. 97-104. IEEE, (2017)Parallel distributed scalable runtime address generation scheme for a coarse grain reconfigurable computation and storage fabric., , , , , и . Microprocess. Microsystems, 38 (8): 788-802 (2014)Clock Tree Generation by Abutment in Synchoros VLSI Design., , , и . NorCAS, стр. 1-7. IEEE, (2021)MTP-Caffe: Memory, Timing, and Power aware tool for mapping CNNs to GPUs., , , и . PARMA-DITAM@HiPEAC, стр. 31-36. ACM, (2017)Compact generic intermediate representation (CGIR) to enable late binding in coarse grained reconfigurable architectures., , , , и . FPT, стр. 1-6. IEEE, (2011)