Author of the publication

Low-Voltage Low-Power CMOS True-Single-Phase Clocking Scheme with Locally Asynchronous Logic Circuits.

, , , , , and . ISCAS, page 1572-1575. IEEE, (1995)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A high-bandwidth wireless infrared receiver with feedforward offset extractor., , , and . ISCAS (1), page 73-76. IEEE, (2003)High-gain and high-bandwidth rail-to-rail operational amplifier with slew rate boost circuit., , and . ISCAS, IEEE, (2006)All digital phase-locked loop using active inductor oscillator and novel locking algorithm., , , , and . ISCAS, page 486-489. IEEE, (2011)All-Digital PLL Using Pulse-Based DCO., , and . ICECS, page 1268-1271. IEEE, (2007)Simultaneous bidirectional transceiver with impedance matching., , and . ICECS, page 312-315. IEEE, (2008)CMOS bulk input current switch logic circuit., , and . ICECS, page 498-501. IEEE, (2008)Variable-Latency Floating-Point Multipliers for Low-Power Applications., , and . IEEE Trans. Very Large Scale Integr. Syst., 18 (10): 1493-1497 (2010)A 1.3 mW low-IF, current-reuse, and current-bleeding RF front-end for the MICS band with sensitivity of -97 dbm., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (6): 1627-1636 (2015)Buck Converter with Variable Output Voltage for Dynamic Voltage Scaling (DVS) Applications., , , and . ISCIT, page 375-380. IEEE, (2023)A low jitter delay-locked-loop applied for DDR4., , , and . DDECS, page 98-101. IEEE Computer Society, (2013)