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Analytical Models of Breakdown Voltage and Specific On-Resistance for Vertical GaN Unipolar Devices.

H. Huang, J. Huang, H. Hu, J. Cheng, and B. Yi. IEEE Access, (2019)

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Junji Liu

Junji Kato

Cheng-Yung Cheng

Ying Min Cheng

I-Fen Cheng

Other publications of authors with the same name

A novel snapback-free reverse-conducting (RC) SOI-LIGBT with a built-in thyristor.J. Lin, P. Li, J. Cheng, J. Wu, B. Yi, and X. Chen. IEICE Electron. Express, 16 (24): 20190626 (2019)Comprehensive Comparison of Temperature Performances for SiC Trench MOSFET with Integrated Side-wall Schottky Diode and Heterojunction.B. Yi, H. Huang, H. Hu, M. Kong, Y. Guo, W. Shi, J. Cheng, and H. Yang. ASICON, page 1-4. IEEE, (2023)Simulation study on the high-k SJ-VDMOS with gradient side-wall.W. Chen, J. Cheng, J. Lin, and X. Chen. MIPRO, page 60-65. IEEE, (2018)A Vertical Thin Layer pLDMOS with Linear doping realizing ultralow Ron, sp.B. Yi, Z. Wu, J. Cheng, H. Huang, M. Kong, and H. Yang. ASICON, page 1-4. IEEE, (2021)Analytical Models of Breakdown Voltage and Specific On-Resistance for Vertical GaN Unipolar Devices.H. Huang, J. Huang, H. Hu, J. Cheng, and B. Yi. IEEE Access, (2019)A split-gate SiC trench MOSFET with embedded unipolar diode for improved performances.Z. Wu, C. Xia, B. Yi, J. Cheng, H. Huang, M. Kong, H. Yang, and W. Shi. ASICON, page 1-4. IEEE, (2021)Temperature Dependent Optimization for Specific On-Resistance for 900 V Superjunction MOSFETs: Numerical Calculation and Comparison.Z. Zhang, X. Wang, K. Ma, S. Wang, C. Wang, H. Zhou, H. Huang, J. Cheng, B. Yi, and H. Yang. ASICON, page 1-4. IEEE, (2023)Simulation study of a deep-trench LDMOS with bilateral super-junction drift regions.J. Cheng, P. Li, W. Chen, B. Yi, and X. Chen. MIPRO, page 54-59. IEEE, (2018)Modeling and simulation of an insulated-gate HEMT using p-SnO2 gate for high VTH design.B. Yi, Y. Xu, L. Zheng, J. Cheng, H. Huang, M. Kong, and H. Yang. Microelectron. J., (September 2023)Simulation study of an ultra-low specific on-resistance high-voltage pLDMOS with self-biased accumulation layer.B. Yi, Y. Peng, Q. Zhao, M. Kong, J. Cheng, and H. Huang. IEICE Electron. Express, 17 (2): 20190673 (2020)

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Disambiguation of "Cheng, Junji"

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Analytical Models of Breakdown Voltage and Specific On-Resistance for Vertical GaN Unipolar Devices.

Please choose a person to relate this publication to

Junji Liu

Junji Kato

Cheng-Yung Cheng

Ying Min Cheng

I-Fen Cheng

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Cheng, Junji"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Analytical Models of Breakdown Voltage and Specific On-Resistance for Vertical GaN Unipolar Devices.

Please choose a person to relate this publication to

Junji Liu

Junji Kato

Cheng-Yung Cheng

Ying Min Cheng

I-Fen Cheng

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Analytical Models of Breakdown Voltage and Specific On-Resistance for Vertical GaN Unipolar Devices.