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Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits.

, , , , , , and . ISCAS, IEEE, (2006)

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Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective., , , , , , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 214-224. Springer, (2006)Using soft-edge flip-flops to compensate NBTI-induced delay degradation., , and . ACM Great Lakes Symposium on VLSI, page 169-172. ACM, (2009)Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (10): 2741-2752 (2010)Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew., , , , , and . ISCAS, page 1061-1064. IEEE, (2007)Thermal resilient bounded-skew clock tree optimization methodology., , , , , and . DATE, page 832-837. European Design and Automation Association, Leuven, Belgium, (2006)Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits., , , , , , and . ISCAS, IEEE, (2006)Energy efficiency bounds of pulse-encoded buses., , and . ACM Great Lakes Symposium on VLSI, page 183-188. ACM, (2008)Dynamic thermal clock skew compensation using tunable delay buffers., , , , , , , and . ISLPED, page 162-167. ACM, (2006)