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Disambiguation of "Warrier, Tripti S."

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Way Sharing Set Associative Cache Architecture.

, , , and . VLSI Design, page 251-256. IEEE Computer Society, (2012)

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Thulasi Warrier

Tripti Sharma

Manoj Warrier

Tripti Shekhar Mohite

S Danischewski

 

Other publications of authors with the same name

True Random Number Generator based on Voltage-Gated Spintronic structure., and . VLSID, page 377-382. IEEE, (2023)Evaluation of Bit Manipulation Instructions in Optimization of Size and Speed in RISC-V., , , and . VLSID, page 54-59. IEEE, (2021)SkipCache: application aware cache management for chip multi-processors., , and . IET Comput. Digit. Tech., 9 (6): 293-299 (2015)2L-2D Routing for Buffered Mesh Network-on-Chip., , , , , and . VDAT, volume 1066 of Communications in Computer and Information Science, page 308-320. Springer, (2019)SkipCache: miss-rate aware cache management., , and . PACT, page 481-482. ACM, (2012)An Application-Aware Cache Replacement Policy for Last-Level Caches., , and . ARCS, volume 7767 of Lecture Notes in Computer Science, page 207-219. Springer, (2013)Way Sharing Set Associative Cache Architecture., , , and . VLSI Design, page 251-256. IEEE Computer Society, (2012)SAMO: store aware memory optimizations., , and . Conf. Computing Frontiers, page 33:1-33:10. ACM, (2014)