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Disambiguation of "Takashima, Yasuhiro"

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A device-level placement with multi-directional convex clustering.

, , , and . ACM Great Lakes Symposium on VLSI, page 196-201. ACM, (2004)

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Akira Takashima

Yasuhiro Murakawa

Makoto Takashima

Yasuhiro Arahata

Yasuhiro Shirasaki

 

Other publications of authors with the same name

A fast algorithm for crosspoint assignment under crosstalk constraints with shielding effects., , , , and . ISCAS (4), page 489-492. IEEE, (2004)The Oct-Touched Tile: A New Architecture for Shape-Based Routing., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (2): 448-455 (2006)Globally optimal time-multiplexing in inter-FPGA connections for accelerating multi-FPGA systems., , and . FPL, page 212-217. IEEE, (2009)Inter-FPGA Routing for Partially Time-Multiplexing Inter-FPGA Signals on Multi-FPGA Systems with Various Topologies., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 98-A (12): 2572-2583 (2015)A device-level placement with multi-directional convex clustering., , , and . ACM Great Lakes Symposium on VLSI, page 196-201. ACM, (2004)Analytical placement for rectilinear blocks.. ASP-DAC, page 220-225. IEEE, (2015)Theoretical and Experimental Analysis of Traveling Salesman Walk Problem., and . APCCAS, page 241-244. IEEE, (2021)Task Allocation and Scheduling Optimization in the Heterogeneous Core System., , , and . NGCAS, page 86-89. IEEE, (2018)A randomized algorithm for the fixed-length routing problem., , , and . APCCAS, page 711-714. IEEE, (2014)Detailed-Routability of FPGAs with Extremal Switch-Block Structures., , and . ED&TC, page 160-164. IEEE Computer Society, (1996)