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Inherited Redundancy and Configurability Utilization for Repairing Nanowire Crossbars with Clustered Defects.

, , and . DFT, page 98-106. IEEE Computer Society, (2006)

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Design flow of robust routed power distribution for low power ASIC., and . ISCAS (1), page 181-184. IEEE, (2002)A 4Gb/s half-rate DFE with switched-cap and IIR summation for data correction., and . ISCAS, page 1-4. IEEE, (2017)A novel 32-bit scalable multiplier architecture., , and . ACM Great Lakes Symposium on VLSI, page 241-244. ACM, (2003)Variable bit truncation technique for approximate stochastic computing (ASC)., , , , and . ISOCC, page 73-74. IEEE, (2017)An Area Efficient 4Gb/s Half-Rate 3-Tap DFE with Current-Integrating Summer for Data Correction., , , , and . NATW, page 6-11. IEEE, (2016)A built-in calibration system to optimize third-order intermodulation performance of RF amplifiers., , , , , and . MWSCAS, page 599-602. IEEE, (2014)Full custom implementation of a S-Box circuit architecture using power gated PLA structure., , and . MWSCAS, page 294-297. IEEE, (2014)Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach., , , and . ISOCC, page 282-283. IEEE, (2020)Stochastic Edge Detection for Fine-Grained Progressive Precision., , , and . ISOCC, page 119-120. IEEE, (2021)FPGA-based Scalable Road Image Stochastic Denosing Approach., , , and . ISOCC, page 351-352. IEEE, (2021)