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Disambiguation of "Hashimoto, Masanori"

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Design and measurement of 6.4 Gbps 8: 1 multiplexer in 0.18µm CMOS process.

, , and . ASP-DAC, page 9-10. ACM Press, (2005)

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Setsuko Hashimoto

Marcelo Hashimoto

Jujiro Hashimoto

Yoko Hashimoto

 

Other publications of authors with the same name

Quantitative Prediction of On-Chip Capacitive and Inductive Crosstalk Noise and Tradeoff between Wire Cross-Sectional Area and Inductive Crosstalk Effect., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 90-A (4): 724-731 (2007)Accuracy Enhancement of Grid-Based SSTA by Coefficient Interpolation., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 93-A (12): 2441-2446 (2010)Analyzing Impacts of SRAM, FF and Combinational Circuit on Chip-Level Neutron-Induced Soft Error Rate., and . IEICE Trans. Electron., 102-C (4): 296-302 (2019)Proactive Supply Noise Mitigation with Low-Latency Minor Voltage Regulator and Lightweight Current Prediction., and . ITC, page 1-8. IEEE, (2020)Jitter amplifier for oscillator-based true random number generator., , and . ASP-DAC, page 81-82. IEEE, (2011)An oscillator-based true random number generator with process and temperature tolerance., , and . ASP-DAC, page 4-5. IEEE, (2015)Area efficient device-parameter estimation using sensitivity-configurable ring oscillator., , , and . ASP-DAC, page 731-736. IEEE, (2015)Trade-off analysis between timing error rate and power dissipation for adaptive speed control with timing error prediction., , , and . ASP-DAC, page 266-271. IEEE, (2009)Soft Error and Its Countermeasures in Terrestrial Environment., and . ASP-DAC, page 617-622. IEEE, (2020)A performance comparison of PLLs for clock generation using ring oscillator VCO and LC oscillator in a digital CMOS process., , and . ASP-DAC, page 545-546. IEEE Computer Society, (2004)