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Disambiguation of "Onodera, Hidetoshi"

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Design and measurement of 6.4 Gbps 8: 1 multiplexer in 0.18µm CMOS process.

, , and . ASP-DAC, page 9-10. ACM Press, (2005)

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Kaoru Onodera

Keiichi Onodera

Hidetoshi Yamabe

 

Other publications of authors with the same name

Variation-aware Flip-Flop energy optimization for ultra low voltage operation., , , and . SoCC, page 17-22. IEEE, (2014)On-chip temperature and process variation sensing using a reconfigurable Ring Oscillator., , and . VLSI-DAT, page 1-4. IEEE, (2017)An area effective forward/reverse body bias generator for within-die variability compensation., , and . A-SSCC, page 217-220. IEEE, (2011)Analysis and comparison of XOR cell structures for low voltage circuit design., , and . ISQED, page 703-708. IEEE, (2013)Multi-Level Optimization for Large Fan-In Optical Logic Circuits Using Integrated Nanophotonics., , , , , , , and . ICRC, page 1-8. IEEE, (2018)An Integrated Optical Parallel Multiplier Exploiting Approximate Binary Logarithms Towards Light Speed Data Processing., , , , and . ICRC, page 1-6. IEEE, (2018)BDD-based synthesis of optical logic circuits exploiting wavelength division multiplexing., , , , , and . ASP-DAC, page 203-209. ACM, (2019)Worst-case delay analysis considering the variability of transistors and interconnects., , and . ISPD, page 35-42. ACM, (2007)A functional memory type parallel processor for vector quantization., , , , and . ASP-DAC, page 665-666. IEEE, (1997)Post-layout transistor sizing for power reduction in cell-based design., and . ASP-DAC, page 359-365. ACM, (2001)