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Datapath and ISA Customization for Soft VLIW Processors., , and . ReConFig, page 280-289. IEEE Computer Society, (2006)RESTful Hardware Microservices Using Reconfigurable Networked Accelerators in Cloud and Edge Datacenters., , , , , and . CloudNet, page 1-4. IEEE, (2018)Double error cellular automata-based error correction with skip-mode compact syndrome coding for resilient PUF design., , , , , , and . ISQED, page 413-418. IEEE, (2018)Dynamically reconfigurable architecture for a driver assistant system., , , , and . SASP, page 62-65. IEEE Computer Society, (2011)Placement-aware partial reconfiguration for a class of FIR-like structures., , , and . ICT, page 965-972. IEEE, (2010)Optimized Distribution of an Accelerated Convolutional Neural Network across Multiple FPGAs., , , , , and . FCCM, page 235. IEEE, (2020)Microarchitectural Enhancements for Configurable Multi-Threaded Soft Processors., , and . FPL, page 782-785. IEEE, (2007)Real-Time Arabic Digit Spotting with TinyML-Optimized CNNs on Edge Devices., , and . AIAI (1), volume 675 of IFIP Advances in Information and Communication Technology, page 527-538. Springer, (2023)Hardware Implementation and Evaluation of an Information Processing Factory., , , , , , and . VLSI-SoC, page 1-6. IEEE, (2023)A Mediation Layer for Connecting Data-Intensive Applications to Reconfigurable Data Nodes., , , , , , , , , and . ICCCN, page 1-9. IEEE, (2013)