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Disambiguation of "Lee, Jae-Jin"

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Bit-level super-systolic array for FIR filter with a FPGA-based bit-serial semi-systolic multiplier.

, and . FPGA, page 249. ACM, (2004)

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Jae Jin Kim

Jae Jin Myung

Seung-Jae Lee

Jae-Hoon Lee

Jae One Lee

 

Other publications of authors with the same name

Multi-core architecture for video decoding., , and . ISOCC, page 25-28. IEEE, (2012)Super Semi-systolic Array-Based Application-Specific PLD Architecture., and . ARC, volume 3985 of Lecture Notes in Computer Science, page 461-466. Springer, (2006)Multi-core platform for an efficient H.264 and VC-1 video decoding based on macroblock row-level parallelism., , and . IET Circuits Devices Syst., 4 (2): 147-158 (2010)Implementation of the super-systolic array for convolution., and . ASP-DAC, page 491-494. ACM, (2003)Spiking Neural Networks-Inspired Signal Detection Based on Measured Body Channel Response., , , , , , and . IEEE Trans. Instrum. Meas., (2022)Developing TEI-Aware Ultralow-Power SoC Platforms for IoT End Nodes., , , , , , , and . IEEE Internet Things J., 8 (6): 4642-4656 (2021)Anti-Spoofing for Fingerprint Recognition Using Electric Body Pulse Response., , , , , , and . IEEE Internet Things J., 11 (4): 5993-6006 (February 2024)From a Categorical Structure to a Concept Model: The International Classification of Health Interventions (ICHI)., , , , , and . MedInfo, volume 245 of Studies in Health Technology and Informatics, page 1334. IOS Press, (2017)Releasing the Memory Bottleneck to Display Video Correctly., , , and . ISOCC, page 340-341. IEEE, (2022)Optimizing Implementation of SNN for Embedded System., , and . ICACT, page 104-106. IEEE, (2024)