( en | de | ru )

 

Disambiguation of "Tsai, Yuh-Fang"

Author of the publication

copydeleteadd this publication to your clipboard
Leakage-Aware Interconnect for On-Chip Network

, , , and . CoRR, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Fang-Yuh Lo

Fen-fang Tsai

Pei-Fang Tsai

Pei-Fang Frederika Tsai

Pei-Fang Frederika Tsai

 

Other publications of authors with the same name

Leakage-Aware Interconnect for On-Chip Network, , , and . CoRR, (2007)Implications of technology scaling on leakage reduction techniques., , , and . DAC, page 187-190. ACM, (2003)Reducing leakage energy in FPGAs using region-constrained placement., , , , , and . FPGA, page 51-58. ACM, (2004)Leakage-Aware Interconnect for On-Chip Network., , , and . DATE, page 230-231. IEEE Computer Society, (2005)Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty., , , and . VLSI Design, page 374-379. IEEE Computer Society, (2005)Managing Leakage Energy in Cache Hierarchies., , , , , , and . J. Instruction-Level Parallelism, (2003)Characterization and modeling of run-time techniques for leakage power reduction., , , and . IEEE Trans. Very Large Scale Integr. Syst., 12 (11): 1221-1233 (2004)Design Space Exploration for 3-D Cache., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 16 (4): 444-455 (2008)Exploiting VLIW schedule slacks for dynamic and leakage energy reduction., , , , , and . MICRO, page 102-113. ACM/IEEE Computer Society, (2001)Evaluating Run-Time Techniques for Leakage Power Reduction., , , and . ASP-DAC/VLSI Design, page 31-38. IEEE Computer Society, (2002)