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Disambiguation of "Lim, Sung Kyu"

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TP-GNN: A Graph Neural Network Framework for Tier Partitioning in Monolithic 3D ICs.

, , , , and . DAC, page 1-6. IEEE, (2020)

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Sung-Ki Lim

Yong-Sung Lim

Han-Sung Lim

Sung-Kyu Hong

Sung-Yeun Lim

 

Other publications of authors with the same name

Profile-Driven Instruction Mapping for Dataflow Architectures., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (12): 3017-3025 (2006)Design-Aware Partitioning-Based 3-D IC Design Flow With 2-D Commercial Tools., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (3): 410-423 (2022)Fast and Accurate Full-chip Extraction and Optimization of TSV-to-Wire Coupling., , and . DAC, page 28:1-28:6. ACM, (2014)Fast bidirectional shortest path on GPU., , , , , and . IEICE Electron. Express, 13 (6): 20160036 (2016)Ultra-Dense 3D Physical Design Unlocks New Architectural Design Points with Large Benefits., , , , , , , , , and . DATE, page 1-6. IEEE, (2023)RTL-to-GDS Design Tools for Monolithic 3D ICs., , , , , , , , , and . ICCAD, page 126:1-126:8. IEEE, (2020)Pin-3D: A Physical Synthesis and Post-Layout Optimization Flow for Heterogeneous Monolithic 3D ICs., , , , and . ICCAD, page 4:1-4:9. IEEE, (2020)Three-Tier 3D ICs for More Power Reduction: Strategies in CAD, Design, and Bonding Selection., , , and . ICCAD, page 752-757. IEEE, (2015)Doomed Run Prediction in Physical Design by Exploiting Sequential Flow and Graph Learning., , , and . ICCAD, page 1-9. IEEE, (2021)Cascade2D: A design-aware partitioning approach to monolithic 3D IC with 2D commercial tools., , , , , , and . ICCAD, page 130. ACM, (2016)