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Disambiguation of "Jang, Doojin"

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A 0.0046mm2 6.7μW Three-Stage Amplifier Capable of Driving 0.5-to-1.9nF Capacitive Load with >0.68MHz GBW without Compensation Zero.

, , , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2020)

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Saeed Jangani

Eun-Ju Jang

Hee-Kwon Jang

Myoung-Souk Jang

Liem Khiem Jang

 

Other publications of authors with the same name

A 3.9μW, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with Degeneration R-DAC for Bidirectional Neural Interface in 180nm CMOS., , , , , , , , , and . A-SSCC, page 91-92. IEEE, (2018)A 96.6%-Efficiency Continuous-Input-Current Hybrid Dual-Path Buck-Boost Converter with Single-Mode Operation and Non-Stopping Output Current Delivery., , , , , , and . VLSI Circuits, page 1-2. IEEE, (2021)A 7V/μs-DVS Class-G Digital-Shunt-Aided Buck Voltage Regulator Achieving a 7% Dynamic-Efficiency Drop at a 600kHz DVS Occurrence Frequency in 28nm CMOS., , , , , , and . CICC, page 1-2. IEEE, (2024)A Level Shifter for CMRR-Enhanced Biopotential Acquisition Systems with Human-Body-Coupled Floating Supply Domain., , and . APCCAS, page 365-368. IEEE, (2019)A neural recording amplifier based on adaptive SNR optimization technique for long-term implantation., , , , , , , , and . BioCAS, page 1-4. IEEE, (2017)An On-Chip Dual-Output Switched-Capacitor DC- DC Converter with Fine-Grained Output Control., , , , and . ISCAS, page 1-5. IEEE, (2021)Input-Adaptive and Regulated Multi-Output Power Management Unit for Wireless Power Reception and Distribution in Multi-Unit Implantable Devices., , , and . A-SSCC, page 1-4. IEEE, (2020)A 0.0046mm2 6.7μW Three-Stage Amplifier Capable of Driving 0.5-to-1.9nF Capacitive Load with >0.68MHz GBW without Compensation Zero., , , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2020)A Multimodal Multichannel Neural Activity Readout IC with 0.7μW/Channel Ca2+-Probe-Based Fluorescence Recording and Electrical Recording., , , , , , , , and . VLSI Circuits, page 290-. IEEE, (2019)