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8 Tbps Co-Packaged FPGA and Silicon Photonics Optical IO.

K. Hosseini, E. Kok, S. Shumarayev, C. Chiu, A. Sarkar, A. Toda, Y. Ke, A. Chan, D. Jeong, M. Zhang, S. Raman, T. Tran, K. Singh, P. Bhargava, C. Zhang, H. Lu, R. Mahajan, X. Li, N. Deshpande, C. O'Keeffe, T. Hoang, U. Krishnamoorthy, C. Sun, R. Meade, V. Stojanovic, and M. Wade. OFC, page 1-3. IEEE, (2021)

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Taghi Kaveh

Kaveh Arzani

Kaveh Towfighi

Afshin Hosseini

Mahmoud Hosseini

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Automated Tuning of Ring-Assisted MZI-Based Interleaver for DWDM Systems.S. Wang, Y. Wang, X. Meng, K. Hosseini, T. Hoang, and K. Bergman. OFC, page 1-3. IEEE, (2024)8 Tbps Co-Packaged FPGA and Silicon Photonics Optical IO.K. Hosseini, E. Kok, S. Shumarayev, C. Chiu, A. Sarkar, A. Toda, Y. Ke, A. Chan, D. Jeong, M. Zhang and 16 other author(s). OFC, page 1-3. IEEE, (2021)A spur-free MASH digital delta-sigma modulator with higher order shaped dither.B. Fitzgibbon, K. O'Neill, A. Grannell, C. Horgan, Z. Ye, K. Hosseini, and M. Kennedy. ECCTD, page 723-726. IEEE, (2009)Silicon Photonics Chip I/O for Ultra High-Bandwidth and Energy-Efficient Die-to-Die Connectivity.Y. Wang, S. Wang, R. Parsons, A. Novick, V. Gopal, K. Jang, A. Rizzo, C. Chiu, K. Hosseini, T. Hoang and 2 other author(s). CICC, page 1-8. IEEE, (2024)Simultaneous Error-Free Data Modulation with Silicon Microdisks in the Multi-FSR Regime for Scalable DWDM Links.V. Gopal, A. Rizzo, M. Hattink, A. Novick, J. Robinson, K. Hosseini, T. Hoang, and K. Bergman. OFC, page 1-3. IEEE, (2023)Prediction of the Spectrum of a Digital Delta-Sigma Modulator Followed by a Polynomial Nonlinearity.K. Hosseini, M. Kennedy, S. Lewis, and B. Levy. IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (8): 1905-1913 (2010)Calculation of cycle lengths in MASH 1-2-2 digital delta sigma modulators with a constant input.K. O'Neill, B. Fitzgibbon, K. Hosseini, and M. Kennedy. ECCTD, page 627-630. IEEE, (2009)5.12 Tbps Co-Packaged FPGA and Silicon Photonics Interconnect I/O.K. Hosseini, E. Kok, S. Shumarayev, D. Jeong, A. Chan, A. Katzin, S. Liu, R. Roucka, M. Raval, M. Mac and 25 other author(s). VLSI Technology and Circuits, page 260-261. IEEE, (2022)

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Disambiguation of "Hosseini, Kaveh"

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8 Tbps Co-Packaged FPGA and Silicon Photonics Optical IO.

Please choose a person to relate this publication to

Taghi Kaveh

Kaveh Arzani

Kaveh Towfighi

Afshin Hosseini

Mahmoud Hosseini

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Hosseini, Kaveh"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 8 Tbps Co-Packaged FPGA and Silicon Photonics Optical IO.

Please choose a person to relate this publication to

Taghi Kaveh

Kaveh Arzani

Kaveh Towfighi

Afshin Hosseini

Mahmoud Hosseini

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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8 Tbps Co-Packaged FPGA and Silicon Photonics Optical IO.