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Structure-Aware Placement Techniques for Designs With Datapaths.

S. Ward, M. Kim, N. Viswanathan, Z. Li, C. Alpert, E. Jr., and D. Pan. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (2): 228-241 (2013)

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David Tse-chien Pan

Z Taufig

Xiaoqing Pan

Petra Pan

Yaling Pan

Other publications of authors with the same name

Cut Redistribution and Insertion for Advanced 1-D Layout Design via Network Flow Optimization.Y. Zhang, W. Lyu, W. Luk, F. Yang, H. Zhou, D. Zhou, D. Pan, and X. Zeng. IEEE Trans. Very Large Scale Integr. Syst., 26 (9): 1613-1626 (2018)Light in AI: Toward Efficient Neurocomputing With Optical Neural Networks - A Tutorial.J. Gu, C. Feng, H. Zhu, R. Chen, and D. Pan. IEEE Trans. Circuits Syst. II Express Briefs, 69 (6): 2581-2585 (2022)PiPSim: A Behavior-Level Modeling Tool for CNN Processing-in-Pixel Accelerators.A. Roohi, S. Tabrizchi, M. Morsali, D. Pan, and S. Angizi. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (1): 141-150 (January 2024)Impact of Mechanical Stress on the Full Chip Timing for Through-Silicon-Via-based 3-D ICs.K. Athikulwongse, J. Yang, D. Pan, and S. Lim. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (6): 905-917 (2013)Subresolution Assist Feature Generation With Supervised Data Learning.X. Xu, Y. Lin, M. Li, T. Matsunawa, S. Nojima, C. Kodama, T. Kotani, and D. Pan. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (6): 1225-1236 (2018)Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization.S. Rai, W. Neto, Y. Miyasaka, X. Zhang, M. Yu, Q. Yi, M. Fujita, G. Manske, M. Pontes, L. da Rosa Jr. and 31 other author(s). CoRR, (2020)An Effective Layout Decomposition Method for DSA with Multiple Patterning in Contact-Hole Generation.Y. Yang, W. Luk, H. Zhou, D. Pan, D. Zhou, C. Yan, and X. Zeng. ACM Trans. Design Autom. Electr. Syst., 23 (1): 11:1-11:27 (2017)On-chip QNN: Towards Efficient On-Chip Training of Quantum Neural Networks.H. Wang, Z. Li, J. Gu, Y. Ding, D. Pan, and S. Han. CoRR, (2022)An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design.M. Liu, H. Yang, Z. Li, K. Sastry, S. Mukhopadhyay, S. Dogru, A. Anandkumar, D. Pan, B. Khailany, and H. Ren. CoRR, (2022)OpenMPL: An Open Source Layout Decomposer.Q. Sun, Y. Lin, I. Jiang, B. Yu, and D. Pan. CoRR, (2018)

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Disambiguation of "Pan, David Z."

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URL
DOI
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Chicago
DIN 1505
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Structure-Aware Placement Techniques for Designs With Datapaths.

Please choose a person to relate this publication to

David Tse-chien Pan

Z Taufig

Xiaoqing Pan

Petra Pan

Yaling Pan

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Pan, David Z."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Structure-Aware Placement Techniques for Designs With Datapaths.

Please choose a person to relate this publication to

David Tse-chien Pan

Z Taufig

Xiaoqing Pan

Petra Pan

Yaling Pan

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Structure-Aware Placement Techniques for Designs With Datapaths.