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A 1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters., , , , и . CICC, стр. 501-504. IEEE, (2006)A 570fsrms integrated-jitter ring-VCO-based 1.21GHz PLL with hybrid loop., , и . ISSCC, стр. 98-100. IEEE, (2011)A Novel Automatic Quality Factor Tuning Scheme for a Low-Power Wideband Active-RC Filter., , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 92-A (2): 411-420 (2009)A Low-Power Low-Noise Clock Signal Generator for Next-Generation Mobile Wireless Terminals., , , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (2): 557-560 (2008)A novel quality factor tuning scheme for active-RC filters., , , и . ESSCIRC, стр. 496-499. IEEE, (2007)A fourth-order bandpass Δ-Σ modulator using second-order bandpass noise-shaping dynamic element matching., , , и . IEEE J. Solid State Circuits, 37 (7): 809-816 (2002)26.1 A 5.5mW ADPLL-based receiver with hybrid-loop interference rejection for BLE application in 65nm CMOS., , , , , , и . ISSCC, стр. 436-437. IEEE, (2016)6.7 A 1.2e- temporal noise 3D-stacked CMOS image sensor with comparator-based multiple-sampling PGA., , , , , , , , и . ISSCC, стр. 122-123. IEEE, (2016)19.7 A 65nm CMOS ADPLL with 360µW 1.6ps-INL SS-ADC-based period-detection-free TDC., , , , , и . ISSCC, стр. 336-337. IEEE, (2016)20 mV input, 4.2 V output SIDO boost converter with low-power controller and adaptive switch size selector for thermoelectric energy harvesting., , , и . A-SSCC, стр. 9-12. IEEE, (2016)