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Disambiguation of "Abellán, José L."

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Leveraging Silicon-Photonic NoC for Designing Scalable GPUs.

, , , , , and . ICS, page 273-282. ACM, (2015)

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José Reyes L

Humberto Jorge José

Nadine José Gonzalez

José Baena

José Teixeira

 

Other publications of authors with the same name

Characterizing the basic synchronization and communication operations in Dual Cell-based Blades through CellStats., , and . J. Supercomput., 53 (2): 247-268 (2010)Spartan: A Sparsity-Adaptive Framework to Accelerate Deep Neural Network Training on GPUs., , , , , , , , and . IEEE Trans. Parallel Distributed Syst., 32 (10): 2448-2463 (2021)CNN-SIM: A Detailed Arquitectural Simulator of CNN Accelerators., , and . Euro-Par Workshops, volume 11997 of Lecture Notes in Computer Science, page 720-724. Springer, (2019)TAP-2.5D: A Thermally-Aware Chiplet Placement Methodology for 2.5D Systems., , , , and . DATE, page 1246-1251. IEEE, (2021)Understanding the Design-Space of Sparse/Dense Multiphase GNN dataflows on Spatial Accelerators., , , , , , , , , and 1 other author(s). IPDPS, page 571-582. IEEE, (2022)Characterizing the Basic Synchronization and Communication Operations in Dual Cell-Based Blades., , and . ICCS (1), volume 5101 of Lecture Notes in Computer Science, page 456-465. Springer, (2008)Scalability Limitations of Processing-in-Memory using Real System Evaluations., , , , , , , , , and 1 other author(s). SIGMETRICS/Performance (Abstracts), page 63-64. ACM, (2024)Accelerating Finite Field Arithmetic for Homomorphic Encryption on GPUs., , , , , , , , and . IEEE Micro, 43 (5): 55-63 (September 2023)InsideNet: A tool for characterizing convolutional neural networks., , and . Future Gener. Comput. Syst., (2019)Efficient Hardware-Supported Synchronization Mechanisms for Manycores., , and . Handbook on Data Centers, Springer, (2015)