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Hardware architectural support for control systems and sensor processing.

, , , , , и . ACM Trans. Embed. Comput. Syst., 13 (2): 16:1-16:25 (2013)

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Enhancing Compiler Techniques for Memory Energy Optimizations., , и . EMSOFT, том 2491 из Lecture Notes in Computer Science, стр. 364-381. Springer, (2002)Exploring Area/Delay Tradeoffs in an AES FPGA Implementation., , и . FPL, том 3203 из Lecture Notes in Computer Science, стр. 575-585. Springer, (2004)k-NN text classification using an FPGA-based sparse matrix vector multiplication accelerator., , , , , и . EIT, стр. 257-263. IEEE, (2015)An FPGA-based Hardware Accelerator for Iris Segmentation., , и . ReConFig, стр. 1-8. IEEE, (2018)Design and Implementation of an FPGA Architecture for High-Speed Network Feature Extraction., , , , и . FPT, стр. 49-56. IEEE, (2007)Towards Reverse Engineering Controller Area Network Messages Using Machine Learning., , и . WF-IoT, стр. 1-6. IEEE, (2020)An I/O Bandwidth-Sensitive Sparse Matrix-Vector Multiplication Engine on FPGAs., , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (1): 113-123 (2012)Perf-Sat: Runtime Detection of Performance Saturation for GPGPU Applications., , и . ICPP Workshops, стр. 1-8. IEEE Computer Society, (2014)Parallelizing Latent Semantic Indexing using an FPGA-based architecture., и . ICCD, стр. 432-435. IEEE Computer Society, (2016)Cache design for mixed criticality real-time systems., , , , , и . ICCD, стр. 513-516. IEEE Computer Society, (2014)