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Disambiguation of "Soudris, Dimitrios"

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GPU Implementation of Neural-Network Simulations Based on Adaptive-Exponential Models.

, , , , , and . BIBE, page 339-343. IEEE, (2019)

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Dimitrios Papanastasiou

Dimitrios Tourpalis

Dimitrios Moulalis

Dimitrios Tassiopoulos

Dimitrios Dadaliaris

 

Other publications of authors with the same name

Quick_Hotspot: A Software Supported Methodology for Supporting Run-Time Thermal Analysis at MPSoC Designs., , and . ARCS Workshops, VDE-Verlag, (2011)Designing Low Power Direct Digital Frequency Synthesizers., , , and . VLSI-SOC, page 105-110. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)A novel coarse-grain reconfigurable data-path for accelerating DSP kernels., , , , and . FPGA, page 252. ACM, (2004)HARPA: Solutions for dependable performance under physically induced performance variability., , , , , , , , , and 5 other author(s). SAMOS, page 270-277. IEEE, (2015)A framework for exploring alternative fault-tolerant schemes targeting 3-D reconfigurable architectures., , and . SAMOS, page 336-341. IEEE, (2016)A high performance data-path to accelerate DSP kernels., , , , and . ICECS, page 495-498. IEEE, (2004)Resource Aware GPU Scheduling in Kubernetes Infrastructure., , , , and . PARMA-DITAM@HiPEAC, volume 88 of OASIcs, page 4:1-4:12. Schloss Dagstuhl - Leibniz-Zentrum für Informatik, (2021)The low power baseband processing parts of a novel dual mode DECT/GSM terminal., , , , and . ICECS, page 35-38. IEEE, (2001)Designing low-power energy recovery adders based on pass transistor logic., , and . ICECS, page 777-780. IEEE, (2001)Systematic design of full adder-based architectures for convolution., , , , and . ICASSP (1), page 389-392. IEEE Computer Society, (1993)