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Evaluation of Pseudo Vector Processor Based on Slide-Windowed Registers.

, , , , , , and . HICSS (1), page 368-377. IEEE Computer Society, (1994)

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A Tunnel-Diode High-Speed Memory., , , and . IFIP Congress, page 603-607. (1962)Esaki Diode High-Speed Logical Circuits., , , , , , , , , and . IRE Trans. Electron. Comput., 9 (1): 25-29 (1960)Evaluation of Pseudo Vector Processor Based on Slide-Windowed Registers., , , , , , and . HICSS (1), page 368-377. IEEE Computer Society, (1994)A superscalar RISC processor with pseudo vector processing feature., , , , , , , and . ICCD, page 102-109. IEEE Computer Society, (1995)Very high speed serial and serial-parallel computers HITAC 5020 and 5020E., and . AFIPS Fall Joint Computing Conference (1), page 187-203. ACM, (1964)Pseudo Vector Processor Based on Register-Windowed Superscalar Pipeline., , , and . SC, page 642-651. IEEE Computer Society, (1992)CP-PACS: A Massively Parallel Processor for Large Scale Scientific Calculations., , , and . International Conference on Supercomputing, page 108-115. ACM, (1997)Advanced processor design using hardware description language AIDL., , , , and . ASP-DAC, page 387-390. IEEE, (1997)A Scalar Architecture for Pseudo Vector Processing Based on Slide-Windowed Registers., , , , , , , and . International Conference on Supercomputing, page 298-307. ACM, (1993)