From post

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

 

Другие публикации лиц с тем же именем

On stress aware active area sizing, gate sizing, and repeater insertion., и . ISPD, стр. 35-42. ACM, (2009)Editorial: ACM Transactions on Design Automation of Electronics Systems and Beyond., , и . ACM Trans. Design Autom. Electr. Syst., 20 (1): 1:1-1:2 (2014)ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction., , , и . DAC, стр. 504-509. ACM, (2008)Machine learning for IC design and technology co-optimization in extreme scaling.. VLSI-DAT, стр. 1. IEEE, (2018)AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection., , , и . DAC, стр. 795-800. ACM, (2011)High-level synthesis of error detecting cores through low-cost modulo-3 shadow datapaths., , , и . DAC, стр. 161:1-161:6. ACM, (2015)Accurate Waveform Modeling using Singular Value Decomposition with Applications to Timing Analysis., , , , и . DAC, стр. 148-153. IEEE, (2007)PASAP: power aware structured ASIC placement., и . ISLPED, стр. 395-400. ACM, (2010)Skew Bounded Buffer Tree Resynthesis For Clock Power Optimization., , , , , и . ACM Great Lakes Symposium on VLSI, стр. 87-90. ACM, (2015)BOB-router: A new buffering-aware global router with over-the-block routing resources optimization., , и . ASP-DAC, стр. 513-518. IEEE, (2014)