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Disambiguation of "Verbauwhede, Ingrid"

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Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system.

, , , , , , , and . DAC, page 60-65. ACM, (2003)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Ingrid Lühr

Internationale Rechnungslegung für kleine und mittelgroße Unternehmen. Uni Hagen, (2009)

Ingrid Simon

Ingrid Arndt

Ingrid Ridelis

Ingrid Krüger

 

Other publications of authors with the same name

Place and Route for Secure Standard Cell Design., and . CARDIS, volume 153 of IFIP, page 143-158. Kluwer/Springer, (2004)Synthesis of Secure FPGA Implementations., and . IACR Cryptology ePrint Archive, (2004)Efficient Software Implementation of Ring-LWE Encryption., , , and . IACR Cryptology ePrint Archive, (2014)Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients., , , , , , and . DAC, page 399-404. ACM, (2002)Synthesis for real time systems: Solutions and challenges., and . VLSI Signal Processing, 9 (1-2): 67-88 (1995)Analysis of multidimensional DSP specifications., , and . IEEE Trans. Signal Process., 44 (12): 3169-3174 (1996)Iteration Bound Analysis and Throughput Optimum Architecture of SHA-256 (384, 512) for Hardware Implementations., , and . WISA, volume 4867 of Lecture Notes in Computer Science, page 102-114. Springer, (2007)Teaching HW/SW codesign with a Zynq ARM/FPGA SoC., , , , , and . EWME, page 63-66. IEEE, (2018)Lightweight Prediction-Based Tests for On-Line Min-Entropy Estimation., , , and . IEEE Embed. Syst. Lett., 9 (2): 45-48 (2017)Unlocking the design secrets of a 2.29 Gb/s Rijndael processor., , and . DAC, page 634-639. ACM, (2002)