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Focus on What is Needed: Area and Power Efficient FPGAs Using Turn-Restricted Switch Boxes.

, , , , and . ISVLSI, page 615-620. IEEE, (2019)

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Enabling Efficient RDMA-based Synchronous Mirroring of Persistent Memory Transactions., , , , , , , , , and 3 other author(s). CoRR, (2018)GenPIP: In-Memory Acceleration of Genome Analysis via Tight Integration of Basecalling and Read Mapping., , , , , , , , and . MICRO, page 710-726. IEEE, (2022)RowPress: Amplifying Read Disturbance in Modern DRAM Chips., , , , , , , , and . ISCA, page 28:1-28:18. ACM, (2023)CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations., , , , , , , , , and 3 other author(s). ISCA, page 484-497. IEEE, (2021)FLIN: Enabling Fairness and Enhancing Performance in Modern NVMe Solid State Drives., , , , , , , , , and . ISCA, page 397-410. IEEE Computer Society, (2018)Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources., , , , , , , and . MICRO, page 1178-1195. ACM, (2023)A High-bandwidth High-capacity Hybrid 3D Memory for GPUs., , , , , and . SIGMETRICS/Performance (Abstracts), page 67-68. ACM, (2024)Chapter Three - A power-performance balanced network-on-chip for mixed CPU-GPU systems., , , and . Adv. Comput., (2022)Effective cache bank placement for GPUs., , , , and . DATE, page 31-36. IEEE, (2017)Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction., , , , , , and . MICRO, page 1-18. IEEE, (2022)