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17.4 A 14nm 1.1Mb embedded DRAM macro with 1ns access., , , , , , , , , и 4 other автор(ы). ISSCC, стр. 1-3. IEEE, (2015)Invited Talk: SAT and SMT Solving at Cloud Scale.. SMT, том 3429 из CEUR Workshop Proceedings, стр. 2. CEUR-WS.org, (2023)Providing the shalls, , , и . International Journal on Software Tools for Technology Transfer (STTT), (2007)The Effect of Program and Model Structure on the Effectiveness of MC/DC Test Adequacy Coverage, , , , и . ACM Transactions on Software Engineering and Methodology, 25 (3): 25 (августа 2016)Wideband Rapid Interferer Detector Exploiting Compressed Sampling With a Quadrature Analog-to-Information Converter., , , , , и . IEEE J. Solid State Circuits, 50 (12): 3047-3064 (2015)Inductive Validity Cores., , , и . IEEE Trans. Software Eng., 47 (2): 279-299 (2021)Machine-Checked Proofs for Realizability Checking Algorithms., , и . VSTTE, том 9593 из Lecture Notes in Computer Science, стр. 110-123. Springer, (2015)Model-Checking of Safety-Critical Software for Avionics., , и . ERCIM News, (2008)Development of Security Software: A High Assurance Methodology., , , , и . ICFEM, том 5885 из Lecture Notes in Computer Science, стр. 266-285. Springer, (2009)Unsatisfiability Proofs for Distributed Clause-Sharing SAT Solvers., , , , и . TACAS (1), том 13993 из Lecture Notes in Computer Science, стр. 348-366. Springer, (2023)