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Mind the Gap: Bridging Verilog and Computer Architecture., , , , and . ISCAS, page 1-5. IEEE, (2020)A Game-Based Framework to Compare Program Classifiers and Evaders., , , , , and . CGO, page 108-121. ACM, (2023)A polynomial time exact solution to the bit-aware register binding problem., , , and . CC, page 29-40. ACM, (2022)Minimum Switching Networks., , , and . SBESC, page 225-230. IEEE, (2018)Google Colab CAD4U: Hands-On Cloud Laboratories for Digital Design., , , , and . ISCAS, page 1-5. IEEE, (2021)A GPU/FPGA-Based K-Means Clustering Using a Parameterized Code Generator., , , , , , , and . WSCAD, page 61-69. IEEE, (2018)The Droplet Search Algorithm for Kernel Scheduling., , , and . ACM Trans. Archit. Code Optim., 21 (2): 35 (June 2024)Explore as a Storm, Exploit as a Raindrop: On the Benefit of Fine-Tuning Kernel Schedulers with Coordinate Descent., , and . CoRR, (2024)Impacto de Ofuscadores e Otimizadores de Código na Acurácia de Classificadores de Programas., , , , and . SBLP, page 68-75. ACM, (2022)A Non-Blocking Multistage Interconnection using Regular Clock Schemes for QCA Circuits., , , , and . SBCCI, page 1-6. IEEE, (2023)