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Disambiguation of "Hsiao, Michael S."

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A New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment.

, , and . J. Electron. Test., 24 (4): 365-378 (2008)

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Chi-Yuan Hsiao

Lojen Hsiao

Kaijen Hsiao

Michael Kai Mikai Hsiao

He-Hsuan Hsiao

 

Other publications of authors with the same name

Hybrid Rule-based and Machine Learning System for Assertion Generation from Natural Language Specifications., and . ATS, page 126-131. IEEE, (2022)Mining Sequential Constraints for Pseudo-Functional Testing., and . ATS, page 19-24. IEEE, (2007)Multiplexed trace signal selection using non-trivial implication-based correlation., and . ISQED, page 697-704. IEEE, (2010)Fast Static Compaction Algorithms for Sequential Circuit Test Vectors., , and . IEEE Trans. Computers, 48 (3): 311-322 (1999)State Variable Extraction and Partitioning to Reduce Problem Complexity for ATPG and Design Validation., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (10): 2275-2282 (2006)Bilateral Testing of Nano-scale Fault-Tolerant Circuits., and . J. Electron. Test., 24 (1-3): 285-296 (2008)Efficient techniques for transition testing., , , and . ACM Trans. Design Autom. Electr. Syst., 10 (2): 258-278 (2005)A Test Pattern Quality Metric for Diagnosis of Multiple Stuck-at and Transition faults., , and . ACM Great Lakes Symposium on VLSI, page 455-458. ACM, (2017)SAT-based equivalence checking of threshold logic designs for nanotechnologies., , and . ACM Great Lakes Symposium on VLSI, page 225-230. ACM, (2008)Branch guided functional test generation at the RTL., , and . ETS, page 1-6. IEEE, (2015)