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A Tool for Analog/RF BIST Evaluation Using Statistical Models of Circuit Parameters., , , and . ACM Trans. Design Autom. Electr. Syst., 20 (2): 31:1-31:22 (2015)Analog/RF test ordering in the early stages of production testing., , , and . VTS, page 25-30. IEEE Computer Society, (2012)Enhanced reduced code linearity test technique for multi-bit/stage pipeline ADCs., , , , and . European Test Symposium, page 1-6. IEEE Computer Society, (2012)Practical Simulation Flow for Evaluating Analog/Mixed-Signal Test Techniques., , , , , and . IEEE Des. Test, 33 (6): 46-54 (2016)Noise modeling using look-up tables and DC measurements for cryogenic applications., , , , , , and . VLSI-SoC, page 1-6. IEEE, (2023)Design of high-performance band-pass sigma-delta modulator with concurrent error detection., , , and . ICECS, page 1202-1205. IEEE, (1996)Estimation of Analog/RF Parametric Test Metrics Based on a Multivariate Extreme Value Model., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (5): 966-976 (2020)On-Chip Pseudorandom MEMS Testing., , , and . J. Electron. Test., 21 (3): 233-241 (2005)Guest Editorial., , and . J. Electron. Test., 22 (4-6): 311 (2006)Low-cost EVM built-in test of RF transceivers., , , and . IDT, page 51-54. IEEE, (2014)