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Disambiguation of "Molina, María C."

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Bit-Level Allocation for Low Power in Behavioural High-Level Synthesis.

, , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 617-627. Springer, (2003)

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María Isabel Grasa Molina

Jose Maria Gonzalez Molina

Maria C Schmitt

Maria C Schmitt

Carlos Molina

 

Other publications of authors with the same name

High-level synthesis of multiple-precision circuitsindependent of data-objects length., , and . DAC, page 612-615. ACM, (2002)A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths., , , , and . Integr., 46 (2): 119-130 (2013)High-Level Allocation to Minimize Internal Hardware Wastage., , and . DATE, page 10264-10269. IEEE Computer Society, (2003)Applying speculation techniques to implement functional units., , , , , and . ICCD, page 74-80. IEEE Computer Society, (2008)Behavioural Scheduling to Balance the Bit-Level Computational Effort., , , and . ISVLSI, page 99-104. IEEE Computer Society, (2004)Multispeculative additive trees in high-level synthesis., , , , and . DATE, page 188-193. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Using Speculative Functional Units in high level synthesis., , , , and . DATE, page 1779-1784. IEEE Computer Society, (2010)Exploiting Bit-Level Delay Calculations to Soften Read-After-Write Dependences in Behavioral Synthesis., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (9): 1589-1601 (2007)Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources., , and . J. Syst. Archit., 49 (12-15): 505-519 (2003)Behavioural Bitwise Scheduling Based on Computational Effort Balancing., , , and . DATE, page 684-685. IEEE Computer Society, (2004)