( en | de | ru )

 

Disambiguation of "Mendías, José M."

Author of the publication

copydeleteadd this publication to your clipboard
A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths.

, , , , and . Integr., 46 (2): 119-130 (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Humberto Jorge José

Nadine José Gonzalez

José Navarrete

José Putharikal

José Schneider

 

Other publications of authors with the same name

Bit-Level Allocation for Low Power in Behavioural High-Level Synthesis., , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 617-627. Springer, (2003)Formal Techniques for Hardware Allocation., , and . VLSI Design, page 161-165. IEEE Computer Society, (1997)Efficient Verification of Scheduling, Allocation and Binding in High-Level Synthesis., , , and . DSD, page 308-315. IEEE Computer Society, (2002)A global approach to improve conditional hardware reuse in high-level synthesis., , and . J. Syst. Archit., 47 (12): 959-975 (2002)Bit-level scheduling of heterogeneous behavioural specifications., , and . ICCAD, page 602-608. ACM / IEEE Computer Society, (2002)Power optimization in heterogenous datapaths., , , , and . DATE, page 1400-1405. IEEE, (2011)A Unified Algorithm for Mutual Exclusiveness Identification., , and . EUROMICRO, page 1504-1510. IEEE Computer Society, (1999)Multiple-Precision Circuits Allocation Independent of Data-Objects Length., , and . DATE, page 909-913. IEEE Computer Society, (2002)Maximizing Conditonal Reuse by Pre-Synthesis Transformations., , and . DATE, page 1097. IEEE Computer Society, (2002)Pre-synthesis optimization of multiplications to improve circuit performance., , , and . DATE, page 1306-1311. European Design and Automation Association, Leuven, Belgium, (2006)