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Advancing Near-Data Processing with Precise Exceptions and Efficient Data Fetching., , , , and . ISPASS, page 230-232. IEEE, (2022)A generic processing in memory cycle accurate simulator under hybrid memory cube architecture., , , and . SAMOS, page 54-61. IEEE, (2017)HMC and DDR Performance Trade-offs., , and . IESS, volume 523 of IFIP Advances in Information and Communication Technology, page 159-171. Springer, (2015)Large vector extensions inside the HMC., , , and . DATE, page 1249-1254. IEEE, (2016)HIPE: HMC instruction predication extension applied on database processing., , , , and . DATE, page 261-264. IEEE, (2018)Avoiding Unnecessary Caching with History-Based Preemptive Bypassing., , and . SBAC-PAD, page 71-80. IEEE, (2022)SAPIVe: Simple AVX to PIM Vectorizer., , , and . SBESC, page 1-8. IEEE, (2022)Exploring Cache Size and Core Count Tradeoffs in Systems with Reduced Memory Access Latency., , , , and . PDP, page 388-392. IEEE Computer Society, (2016)Operand size reconfiguration for big data processing in memory., , , , , and . DATE, page 710-715. IEEE, (2017)Sim2PIM: A Fast Method for Simulating Host Independent & PIM Agnostic Designs., , and . DATE, page 226-231. IEEE, (2021)