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Fletcher: A Framework to Efficiently Integrate FPGA Accelerators with Apache Arrow.

, , , , , и . FPL, стр. 270-277. IEEE, (2019)

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Johan Verink

Johan Setianto

Johan Waern

Johan Schloemann

Johan Vanparys

 

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Fletcher: A Framework to Efficiently Integrate FPGA Accelerators with Apache Arrow., , , , , и . FPL, стр. 270-277. IEEE, (2019)An Intermediate Representation for Composable Typed Streaming Dataflow Designs., , , , , , и . VLDB Workshops, том 3462 из CEUR Workshop Proceedings, CEUR-WS.org, (2023)Tydi-lang: A Language for Typed Streaming Hardware., , , , , , и . SC Workshops, стр. 520-529. ACM, (2023)Methods for Efficient Integration of FPGA Accelerators with Big Data Systems.. Delft University of Technology, Netherlands, (2020)base-search.net (fttudelft:oai:tudelft.nl:uuid:51989f8f-f672-4f4b-a059-86233869ff47).Supporting Columnar In-memory Formats on FPGA: The Hardware Design of Fletcher for Apache Arrow., , , , и . ARC, том 11444 из Lecture Notes in Computer Science, стр. 32-47. Springer, (2019)Tydi: An Open Specification for Complex Data Structures Over Hardware Streams., , , , и . IEEE Micro, 40 (4): 120-130 (2020)Tens of gigabytes per second JSON-to-Arrow conversion with FPGA accelerators., , , , и . FPT, стр. 1-9. IEEE, (2021)Maximizing systolic array efficiency to accelerate the PairHMM Forward Algorithm., , и . BIBM, стр. 758-762. IEEE Computer Society, (2016)Pushing Big Data into Accelerators: Can the JVM Saturate Our Hardware?, , и . ISC Workshops, том 10524 из Lecture Notes in Computer Science, стр. 220-236. Springer, (2017)Battling the CPU Bottleneck in Apache Parquet to Arrow Conversion Using FPGA., , , , , и . FPT, стр. 281-286. IEEE, (2020)