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Exploration of tradeoffs in the design of integer cosine transforms for image compression.

, , , and . ECCTD, page 1-4. IEEE, (2013)

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Finding the optimal tradeoff between area and delay in multiple constant multiplications., , , and . Microprocess. Microsystems, 35 (8): 729-741 (2011)Search algorithms for the multiple constant multiplications problem: Exact and approximate., , and . Microprocess. Microsystems, 34 (5): 151-162 (2010)Hardware Obfuscation of Digital FIR Filters., , , and . DDECS, page 68-73. IEEE, (2022)Multiplierless Design of Linear DSP Transforms., , , and . VLSI-SoC (Selected Papers), volume 379 of IFIP Advances in Information and Communication Technology, page 73-93. Springer, (2011)Efficient design of FIR filters using hybrid multiple constant multiplications on FPGA., , and . ICCD, page 42-47. IEEE Computer Society, (2014)Radix-2 Decimation in Time (DIT) FFT implementation based on a Matrix-Multiple Constant multiplication approach., , , , , and . ICECS, page 859-862. IEEE, (2010)Approximation of multiple constant multiplications using minimum look-up tables on FPGA., , and . ISCAS, page 2884-2887. IEEE, (2015)ECHO: A novel method for the multiplierless design of constant array vector multiplication., , and . ISCAS, page 1456-1459. IEEE, (2014)Novel Methods for Efficient Realization of Logic Functions Using Switching Lattices., and . IEEE Trans. Computers, 69 (3): 427-440 (2020)An approximate algorithm for the multiple constant multiplications problem., and . SBCCI, page 58-63. ACM, (2008)