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Disambiguation of "Suaya, Roberto"

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Leveraging the geometric properties of on-chip transmission line structures to improve interconnect performance: A case study in 65nm.

, , , and . NOCS, page 1-2. IEEE, (2013)

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Roberto Klimmek

Roberto Cruccolini

Roberto Sala

Roberto Fornari

Roberto Ohrt

 

Other publications of authors with the same name

From formal verification to silicon compilation., , , , , and . Compcon, page 450-455. IEEE Computer Society, (1991)High-Frequency Mutual Impedance Extraction of VLSI Interconnects In the Presence of a Multi-layer Conducting Substrate., , and . DATE, page 426-431. ACM, (2008)Leveraging the geometric properties of on-chip transmission line structures to improve interconnect performance: A case study in 65nm., , , and . NOCS, page 1-2. IEEE, (2013)A Two-Dimensional Topological Compactor With Octagonal Geometry., , , and . DAC, page 727-731. ACM, (1991)Low Power SPI Design Based on Relative Timing Techniques., , , , , and . ICECS, page 166-169. IEEE, (2019)Panel I: who is responsible for the design for manufacturability issues in the era of nano-technologies?, , , , , , , , , and . ASP-DAC, ACM Press, (2005)Efficient 3D high-frequency impedance extraction for general interconnects and inductors above a layered substrate., , and . DATE, page 459-464. IEEE Computer Society, (2010)Two-dimensional IC layout compaction based on topological design rule checking., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (3): 260-275 (1990)