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Disambiguation of "Ginosar, Ran"

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The Capacity Allocation Paradox.

, , and . INFOCOM, page 1359-1367. IEEE, (2009)

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Ran Ran

Ran Zhang

Ran Ji

Ran Ettinger

Ran Pan

 

Other publications of authors with the same name

Self-Timed Architecture of a Reduced Instruction Set Computer., , and . Asynchronous Design Methodologies, volume A-28 of IFIP Transactions, page 29-43. North-Holland, (1993)Using Scan Side Channel for Detecting IP Theft., , , and . HASP@ISCA, page 1:1-1:8. ACM, (2016)Parallel VLSI architecture for MAP turbo decoder., , and . PIMRC, page 384-388. IEEE, (2002)An Extended Metastability Simulation Method for Synchronizer Characterization., and . PATMOS, volume 7606 of Lecture Notes in Computer Science, page 42-51. Springer, (2012)POSTER: BioSEAL: In-Memory Biological Sequence Alignment Accelerator for Large-Scale Genomic Data., , and . PACT, page 459-460. IEEE, (2019)Resistive Associative Processor., , , and . IEEE Comput. Archit. Lett., 14 (2): 148-151 (2015)Fast Universal Synchronizers., and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 199-208. Springer, (2008)PRINS: Resistive CAM Processing in Storage., , and . CoRR, (2018)Timing optimization in logic with interconnect., , , and . SLIP, page 19-26. ACM, (2008)Sparse Matrix Multiplication On An Associative Processor., , and . CoRR, (2017)