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Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures., , , , and . J. Electron. Test., 27 (3): 277-288 (2011)Chaos from switched-capacitor circuits: Discrete maps., , , , and . Proc. IEEE, 75 (8): 1090-1106 (1987)A Low-Cost Strategy for Testing Analog Filters., , and . ISCAS, page 123-126. IEEE, (1994)Robust frequency divider based on resonant tunneling devices., , and . ISCAS (3), page 2647-2650. IEEE, (2005)Integrated circuit implementation of fuzzy controllers., , , and . IEEE J. Solid State Circuits, 31 (7): 1051-1058 (1996)Self-Synchronization of Asynchronous Sequential Circutis Employing a General Clock Function., and . IEEE Trans. Computers, 25 (3): 297-300 (1976)Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs., , , , and . Asian Test Symposium, page 359-364. IEEE Computer Society, (2011)New CMOS VLSI linear self-timed architectures., , , , , and . ASYNC, page 14-23. IEEE Computer Society, (1995)Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design., , and . VTS, page 42-47. IEEE Computer Society, (1996)A DFT Technique for Analog-to-Digital Converters with digital correction., , and . VTS, page 302-307. IEEE Computer Society, (1997)