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Disambiguation of "Palesi, Maurizio"

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A Communication-Aware Topological Mapping Technique for NoCs.

, , , and . Euro-Par, volume 5168 of Lecture Notes in Computer Science, page 910-919. Springer, (2008)

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Maurizio Podda

Maurizio Venturini

Maurizio Zanazzi

Maurizio Serva

Maurizio Podda

 

Other publications of authors with the same name

Multi-Objective Evolutionary Fuzzy Clustering for High-Dimensional Problems., , and . FUZZ-IEEE, page 1-6. IEEE, (2007)Efficient design space exploration for application specific systems-on-a-chip., , , , and . J. Syst. Archit., 53 (10): 733-750 (2007)Networks-on-Chip based Deep Neural Networks Accelerators for IoT Edge Devices., , , , , and . IoTSMS, page 227-234. IEEE, (2019)A multiobjective genetic approach for system-level exploration in parameterized systems-on-a-chip., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (4): 635-645 (2005)Bandwidth-aware routing algorithms for networks-on-chip platforms., , and . IET Comput. Digit. Tech., 3 (5): 413-429 (2009)Cloud-Based Energy Efficient Scheme for Sigfox Monarch as Asset Tracking Service., , , and . COINS, page 1-6. IEEE, (2020)Low Energy Mapping Techniques under Reliability and Bandwidth Constraints., , , , and . HPCC/EUC, page 2088-2095. IEEE, (2013)An Instruction-Level Power Analysis Model with Data Dependency., , , and . VLSI Design, 12 (2): 245-273 (2001)Editorial: Special issue on design challenges for many-core processors., , and . ACM Trans. Embed. Comput. Syst., 13 (3s): 100:1-100:2 (2014)Neighbors-on-Path: A New Selection Strategy for On-Chip Networks., , , and . ESTIMedia, page 79-84. IEEE Computer Society, (2006)