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Digital ground bounce reduction by supply current shaping and clock frequency Modulation.

M. Badaroglu, P. Wambacq, G. der Plas, S. Donnay, G. Gielen, и H. Man. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (1): 65-76 (2005)

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Kai Marc Geertsema

Stefaan Van der Vekens

Christian van der Steeg

Christian van der Linde

Adrianus van der Hoeven

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A 2.2mW 5b 1.75GS/s Folding Flash ADC in 90nm Digital CMOS.B. Verbruggen, J. Craninckx, M. Kuijk, P. Wambacq, и G. der Plas. ISSCC, стр. 252-253. IEEE, (2008)Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter.G. der Plas, J. Vandenbussche, W. Daems, A. van den Bosch, G. Gielen, и W. Sansen. DAC, стр. 452-457. ACM, (2000)A gradient-error and edge-effect tolerant switching scheme for a high-accuracy DAC.J. Deveugele, G. der Plas, M. Steyaert, G. Gielen, и W. Sansen. IEEE Trans. Circuits Syst. I Regul. Pap., 51-I (1): 191-195 (2004)Impact of technology scaling on substrate noise generation mechanisms mixed signal ICs.M. Badaroglu, P. Wambacq, G. der Plas, S. Donnay, G. Gielen, и H. Man. CICC, стр. 501-504. IEEE, (2004)Design issues in heterogeneous 3D/2.5D integration.D. Milojevic, P. Marchal, E. Marinissen, G. der Plas, D. Verkest, и E. Beyne. ASP-DAC, стр. 403-410. IEEE, (2013)A 12 bit 200 MHz low glitch CMOS D/A converter.A. den Bosch, M. Borremans, J. Vandenbussche, G. der Plas, A. Marques, J. Bastos, M. Steyaert, G. Gielen, и W. Sansen. CICC, стр. 249-252. IEEE, (1998)Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance.C. Soens, G. der Plas, P. Wambacq, и S. Donnay. DATE, стр. 270-275. IEEE Computer Society, (2005)In-tier diagnosis of power domains in 3D TSV ICs.Y. Araga, M. Nagata, G. der Plas, J. Kim, N. Minas, P. Marchal, Y. Travaly, M. Libois, A. Manna, W. Zhang и 1 other автор(ы). 3DIC, стр. 1-6. IEEE, (2011)A Layout-Aware Synthesis Methodology for RF Circuits.P. Vancorenland, G. der Plas, M. Steyaert, G. Gielen, и W. Sansen. ICCAD, стр. 358-. IEEE Computer Society, (2001)Active-lite interposer for 2.5 & 3D integration.G. Hellings, M. Scholz, M. Detalle, D. Velenis, M. de Potter de ten Broeck, C. Neve, Y. Li, S. Huylenbroeck, S. Chen, E. Marinissen и 5 other автор(ы). VLSIC, стр. 222-. IEEE, (2015)

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