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GlitchMap: An FPGA Technology Mapper for Low Power Considering Glitches.

, , and . DAC, page 318-323. IEEE, (2007)

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BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration Framework., , , , , and . ICCAD, page 1-9. IEEE, (2021)Starfish: An Efficient P&R Co-Optimization Engine with A*-based Partial Rerouting., , , , , and . ICCAD, page 1-9. IEEE, (2021)GPU-accelerated Critical Path Generation with Path Constraints., , , and . ICCAD, page 1-9. IEEE, (2021)Hotspot Detection via Multi-task Learning and Transformer Encoder., , , , , , and . ICCAD, page 1-8. IEEE, (2021)WaferHSL: Wafer Failure Pattern Classification with Efficient Human-Like Staged Learning., and . ICCAD, page 125:1-125:8. ACM, (2022)AdaOPC: A Self-Adaptive Mask Optimization Framework for Real Design Patterns., , , , , , and . ICCAD, page 123:1-123:9. ACM, (2022)Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction., , , , , and . ICCAD, page 1-9. IEEE, (2023)IT-DSE: Invariance Risk Minimized Transfer Microarchitecture Design Space Exploration., , , , , , , and . ICCAD, page 1-9. IEEE, (2023)An Efficient Work-Stealing Scheduler for Task Dependency Graph., , and . ICPADS, page 64-71. IEEE, (2020)A highly compressed timing macro-modeling algorithm for hierarchical and incremental timing analysis., and . ASP-DAC, page 166-171. IEEE, (2018)