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A Coarse-Grain Reconfigurable Machine with Floating-Point Arithmetic Capabilities., , and . ReCoSoC, page 1-7. Univ. Montpellier II, (2006)Approximating sine functions using variable-precision Taylor polynomials., , and . SiPS, page 057-062. IEEE, (2009)OpenCL implementation of Cholesky matrix decomposition., , and . SoC, page 62-67. IEEE, (2011)A reconfigurable FPU as IP component for SoCs., , , and . SoC, page 103-106. IEEE, (2004)A dedicated DMA logic addressing a time multiplexed memory to reduce the effects of the system bus bottleneck., , , and . FPL, page 487-490. IEEE, (2008)Analyzing models of computation for software defined radio applications., , and . SoC, page 1-4. IEEE, (2008)A system level IP integration methodology for fast SOC design., , , , and . SoC, page 127-130. IEEE, (2003)Implementation of a 2D low-pass image filtering algorithm on a reconfigurable device., , , and . ReCoSoC, page 166-170. Univ. Montpellier II, (2007)Implementation and benchmarking of FFT algorithms on multicore platforms., , and . SoC, page 59-62. IEEE, (2010)State of the art baseband DSP platforms for Software Defined Radio: A survey., , , , , and . EURASIP J. Wireless Comm. and Networking, (2011)