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Другие публикации лиц с тем же именем

A reconfigurable FPU as IP component for SoCs., , , и . SoC, стр. 103-106. IEEE, (2004)OpenCL implementation of Cholesky matrix decomposition., , и . SoC, стр. 62-67. IEEE, (2011)A Coarse-Grain Reconfigurable Machine with Floating-Point Arithmetic Capabilities., , и . ReCoSoC, стр. 1-7. Univ. Montpellier II, (2006)Approximating sine functions using variable-precision Taylor polynomials., , и . SiPS, стр. 057-062. IEEE, (2009)A dedicated DMA logic addressing a time multiplexed memory to reduce the effects of the system bus bottleneck., , , и . FPL, стр. 487-490. IEEE, (2008)Analyzing models of computation for software defined radio applications., , и . SoC, стр. 1-4. IEEE, (2008)A system level IP integration methodology for fast SOC design., , , , и . SoC, стр. 127-130. IEEE, (2003)Implementation of a 2D low-pass image filtering algorithm on a reconfigurable device., , , и . ReCoSoC, стр. 166-170. Univ. Montpellier II, (2007)Implementation and benchmarking of FFT algorithms on multicore platforms., , и . SoC, стр. 59-62. IEEE, (2010)Efficient floating-point texture decompression., , и . SoC, стр. 31-34. IEEE, (2010)