Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Synchronization Processor Synthesis for Latency Insensitive Systems., , and . DATE, page 896-897. IEEE Computer Society, (2005)C-based rapid prototyping for digital signal processing., , , , , and . EUSIPCO, page 1-4. IEEE, (2005)A formal method for hardware IP design and integration under I/O and timing constraints., , , , and . ACM Trans. Embed. Comput. Syst., 5 (1): 29-53 (2006)High-Level Synthesis in Latency Insensitive System Methodology., , , , , and . DSD, page 96-101. IEEE Computer Society, (2005)Parallel Deadlock Detection and Recovery for Networks-on-Chip Dedicated to Diffused Computations., and . DSD, page 29-36. IEEE Computer Society, (2013)Hardware Discrete Channel Emulator., , , and . HPCS, page 452-458. IEEE, (2010)Networked Self-adaptive Systems: An Opportunity for Configuring in the Large., , , , , , , and . ERSA, page 81-90. CSREA Press, (2009)Orcc's compa-backend demonstration., , , , , , , , and . DASIP, page 1-2. IEEE, (2014)Virtual UARTs for Reconfigurable Multi-processor Architectures., , and . IPDPS Workshops, page 252-259. IEEE, (2013)A Networked, Lightweight and Partially Reconfigurable Platform., , and . ARC, volume 4943 of Lecture Notes in Computer Science, page 314-319. Springer, (2008)