( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
When Neural Architecture Search Meets Hardware Implementation: from Hardware Awareness to Co-Design.

, , , и . ISVLSI, стр. 25-30. IEEE, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Qiu Jiang

Ping Jiang

Xin Jiang

Kaiyun Jiang

Jiang Yi

 

Другие публикации лиц с тем же именем

Contour: A Process Variation Aware Wear-Leveling Mechanism for Inodes of Persistent Memory File Systems., , , , , и . IEEE Trans. Computers, 70 (7): 1034-1045 (2021)Hardware/Software Co-Exploration of Neural Architectures., , , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (12): 4805-4815 (2020)Battle Against Fluctuating Quantum Noise: Compression-Aided Framework to Enable Robust Quantum Neural Network., , , и . DAC, стр. 1-6. IEEE, (2023)One Proxy Device Is Enough for Hardware-Aware Neural Architecture Search., , , , и . SIGMETRICS (Abstracts), стр. 55-56. ACM, (2022)Towards the design of efficient hash-based indexing scheme for growing databases on non-volatile memory., , , , , и . Future Gener. Comput. Syst., (2020)All-in-One: A Highly Representative DNN Pruning Framework for Edge Devices with Dynamic Power Management., , , , , , , , и . ICCAD, стр. 133:1-133:9. ACM, (2022)Toward Consistent High-Fidelity Quantum Learning on Unstable Devices via Efficient In-Situ Calibration., , , , , и . QCE, стр. 848-858. IEEE, (2023)The design and implementation of an efficient user-space in-memory file system., , , , , и . NVMSA, стр. 1-6. IEEE, (2016)UDORN: A design framework of persistent in-memory key-value database for NVM., , , , , , и . NVMSA, стр. 1-6. IEEE, (2017)Hardware/Software Co-Exploration for Graph Neural Architectures on FPGAs., , , , и . ISVLSI, стр. 358-362. IEEE, (2022)