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Disambiguation of "Zhuge, Qingfeng"

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Contour: A Process Variation Aware Wear-Leveling Mechanism for Inodes of Persistent Memory File Systems.

, , , , , and . IEEE Trans. Computers, 70 (7): 1034-1045 (2021)

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An Empirical Study of NVM-based File System., , , , , and . NVMSA, page 1-6. IEEE, (2021)Optimal scheduling to minimize non-volatile memory access time with hardware cache., , , , and . VLSI-SoC, page 131-136. IEEE, (2010)Performance optimization of multiple memory architectures for DSP., , and . ISCAS (5), page 469-472. IEEE, (2002)An Integrated Framework of Design Optimization and Space Minimization for DSP applications., , and . ISCAS (5), page 601-604. IEEE, (2003)Management and optimization for nonvolatile memory-based hybrid scratchpad memory on multicore embedded processors., , , , and . ACM Trans. Embed. Comput. Syst., 13 (4): 79:1-79:25 (2014)Hardware/Software Co-Exploration of Neural Architectures., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (12): 4805-4815 (2020)Contour: A Process Variation Aware Wear-Leveling Mechanism for Inodes of Persistent Memory File Systems., , , , , and . IEEE Trans. Computers, 70 (7): 1034-1045 (2021)Loop Distribution and Fusion with Timing and Code Size Optimization for Embedded DSPs., , , , , and . EUC, volume 3824 of Lecture Notes in Computer Science, page 121-130. Springer, (2005)Efficent Algorithm of Energy Minimization for Heterogeneous Wireless Sensor Network., , , , , and . EUC, volume 4096 of Lecture Notes in Computer Science, page 25-34. Springer, (2006)General loop fusion technique for nested loops considering timing and code size., , , and . CASES, page 190-201. ACM, (2004)