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Другие публикации лиц с тем же именем

Simulation-based hierarchical sizing and biasing of analog firm IPs., , и . BMAS, стр. 43-48. IEEE, (2009)Switch sizing for very low-voltage switched-capacitor circuits., , и . ICECS, стр. 1549-1552. IEEE, (2001)Pre-simulation symbolic analysis of synchronization issues between discrete event and timed data flow models of computation., , , , , и . DATE, стр. 1671-1676. ACM, (2015)Background analog and mixed signal calibration system for time-interleaved ADC., , и . Microelectron. J., 46 (7): 656-667 (2015)Optimizing Resistances and Capacitances of a Continuous-Time ΣΔ ADC., , и . ICECS, стр. 419-422. IEEE, (2006)Background time skew calibration for time-interleaved ADC using phase detection method., , , и . NEWCAS, стр. 257-260. IEEE, (2012)Design of a 4th-Order Feed-Forward-Compensated Operational Amplifier for Multi-GHz Sampling Frequency Continuous-Time Bandpass Sigma-Delta Modulators., , и . ISCAS, стр. 1-5. IEEE, (2019)Split ADC digital background calibration for high speed SHA-less pipeline ADCs., , , и . ISCAS, стр. 1143-1146. IEEE, (2014)Breaking Analog Biasing Locking Techniques via Re-Synthesis., , , и . ASP-DAC, стр. 555-560. ACM, (2021)Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio Application., , , , и . SMACD, стр. 185-188. IEEE, (2019)