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Synchroscalar: A Multiple Clock Domain, Power-Aware, Tile-Based Embedded Processor.

J. Oliver, R. Rao, P. Sultana, J. Crandall, E. Czernikowski, L. IV, D. Franklin, V. Akella, and F. Chong. ISCA, page 150-161. IEEE Computer Society, (2004)

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Oliver John

Desamparados Oliver y Miñarro

Oliver John Nigge

Y Winter

Rainer Y

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Synchroscalar: A Multiple Clock Domain, Power-Aware, Tile-Based Embedded Processor.J. Oliver, R. Rao, P. Sultana, J. Crandall, E. Czernikowski, L. IV, D. Franklin, V. Akella, and F. Chong. ISCA, page 150-161. IEEE Computer Society, (2004)Twill: A Hybrid Microcontroller-FPGA Framework for Parallelizing Single-Threaded C Programs.D. Gallatin, A. Keen, C. Lupo, and J. Oliver. IPDPS Workshops, page 112-121. IEEE Computer Society, (2014)A semi-autonomous embedded systems course.J. Oliver, L. Slivovksy, B. Benson, and J. Harris. FIE, page 1043-1045. IEEE Computer Society, (2013)A case for smartphone reuse to augment elementary school education.X. Li, P. Ortiz, J. Browne, D. Franklin, J. Oliver, R. Geyer, Y. Zhou, and F. Chong. Green Computing Conference, page 459-466. IEEE Computer Society, (2010)Co-curricular Engagement of Transfer Students.J. Oliver, K. Pan, L. Thompson, and J. Lehr. FIE, page 1-5. IEEE, (2022)Improving DSP Performance with a Small Amount of Field Programmable Logic.J. Oliver, and V. Akella. FPL, volume 2778 of Lecture Notes in Computer Science, page 520-532. Springer, (2003)A Study of Reusing Smartphones to Augment Elementary School Education.X. Li, P. Ortiz, J. Browne, D. Franklin, J. Oliver, R. Geyer, Y. Zhou, and F. Chong. IJHCR, 3 (2): 73-92 (2012)Smartphone Evolution and Reuse: Establishing a More Sustainable Model.X. Li, P. Ortiz, J. Browne, D. Franklin, J. Oliver, R. Geyer, Y. Zhou, and F. Chong. ICPP Workshops, page 476-484. IEEE Computer Society, (2010)Tile size selection for low-power tile-based architectures.J. Oliver, R. Rao, M. Brown, J. Mankin, D. Franklin, F. Chong, and V. Akella. Conf. Computing Frontiers, page 83-94. ACM, (2006)Synchroscalar: Initial Lessons in Power-Aware Design of a Tile-Based Embedded Architecture.J. Oliver, R. Rao, P. Sultana, J. Crandall, E. Czernikowski, L. IV, D. Copsey, D. Keen, V. Akella, and F. Chong. PACS, volume 3164 of Lecture Notes in Computer Science, page 73-85. Springer, (2003)

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Disambiguation of "Oliver, John Y."

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Synchroscalar: A Multiple Clock Domain, Power-Aware, Tile-Based Embedded Processor.

Please choose a person to relate this publication to

Oliver John

Desamparados Oliver y Miñarro

Oliver John Nigge

Y Winter

Rainer Y

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Oliver, John Y."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Synchroscalar: A Multiple Clock Domain, Power-Aware, Tile-Based Embedded Processor.

Please choose a person to relate this publication to

Oliver John

Desamparados Oliver y Miñarro

Oliver John Nigge

Y Winter

Rainer Y

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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MSOffice XML

Synchroscalar: A Multiple Clock Domain, Power-Aware, Tile-Based Embedded Processor.