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Disambiguation of "Krstic, Milos"

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A Hardware Optimized High Throughput LDPC Decoder Supporting 3 Tb/s in 28 nm CMOS.

, , , , , , , and . PIMRC, page 1326-1331. IEEE, (2022)

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Milivoj Krstic

Milos Horvath

Milos Jovanovic

Milos Puzovic

Alesia Miloslavina

 

Other publications of authors with the same name

Impact of Resistive Open and Bridge Defects on the SET Robustness of Standard CMOS Combinational Logic., , , and . EWDTS, page 1-6. IEEE, (2018)Classification of Space Particle Events using Supervised Machine Learning Algorithms., , , , , , and . DSAA, page 1-10. IEEE, (2021)Design and Implementation Strategy of Adaptive Processor-Based Systems for Error Resilient and Power-Efficient Operation., , , and . DDECS, page 57-62. IEEE, (2021)Exploring Software Models for the Resilience Analysis of Deep Learning Accelerators: the NVDLA Case Study., , , , and . DDECS, page 142-147. IEEE, (2022)Novel Approach for Gesture Recognition Using mmWave FMCW RADAR., , , and . VTC Spring, page 1-6. IEEE, (2022)Amplitude- and phase-modulated PSSS for wide bandwidth mixed analog-digital baseband processors in THz communication., , , , , , and . VTC2023-Spring, page 1-6. IEEE, (2023)1542 Gbps Fully Pipelined Fast-SSC Decoding of Polar Codes., , , and . PIMRC, page 1320-1325. IEEE, (2022)A Machine Learning-driven EDAC Method for Space-Application Memory., , , and . DFT, page 1-6. IEEE, (2023)Interfacing 3D-stacked Electronic and Optical NoCs with Mixed CMOS-ECL Bridges: a Realistic Preliminary Assessment., , , and . ACM Great Lakes Symposium on VLSI, page 81-86. ACM, (2018)Towards Error Resilient and Power-Efficient Adaptive Multiprocessor System using Highly Configurable and Flexible Cross-Layer Framework., , , and . IOLTS, page 1-7. IEEE, (2021)