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Disambiguation of "Chakrabarty, Krishnendu"

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Fault-Criticality Assessment for AI Accelerators using Graph Convolutional Networks.

, , , , and . DATE, page 1596-1599. IEEE, (2021)

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Krishnendu Mukherjee

Koushik Chakrabarty

Arnab Chakrabarty

Sayan Chakrabarty

Shyamal Chakrabarty

 

Other publications of authors with the same name

Mathematical Modeling of Intellectual Property Protection Using Partially-Mergeable Cores., , , and . PDPTA, CSREA Press, (2000)Wrapper/TAM co-optimization, constraint-driven test scheduling, and tester data volume reduction for SOCs., , and . DAC, page 685-690. ACM, (2002)Multi-site test optimization for multi-Vdd SoCs using space- and time- division multiplexing., , , , and . DATE, page 1-6. European Design and Automation Association, (2014)Digital Microfluidic Biochips: Towards Functional Diversity, More than Moore, and Cyberphysical Integration.. ACM Great Lakes Symposium on VLSI, page 1. ACM, (2015)Formal Synthesis of Adaptive Droplet Routing for MEDA Biochips., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (8): 2504-2517 (2022)Energy-conscious, deterministic I/O device scheduling in hard real-time systems., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (7): 847-858 (2003)Cross-Contamination Avoidance for Droplet Routing in Digital Microfluidic Biochips., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (6): 817-830 (2012)Test Wrapper Design and Optimization Under Power Constraints for Embedded Cores With Multiple Clock Domains., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (8): 1539-1547 (2007)Contactless Pre-Bond TSV Test and Diagnosis Using Ring Oscillators and Multiple Voltage Levels., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (5): 774-785 (2014)Synterface: Efficient Chip-to-World Interfacing for Flow-Based Microfluidic Biochips Using Pin-Count Minimization., , and . ACM Trans. Embed. Comput. Syst., 18 (5s): 54:1-54:21 (2019)