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Timing Analysis and Performance Improvement of MOS VLSI Designs.. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (4): 650-665 (1987)Timing analysis for nMOS VLSI.. DAC, page 411-418. ACM/IEEE, (1983)MIPS: A microprocessor architecture., , , , , , and . MICRO, page 17-22. ACM/IEEE, (1982)Telepresence Systems With Automatic Preservation of User Head Height, Local Rotation, and Remote Translation., and . ICRA, page 62-68. IEEE, (2005)Heterogeneous Chip Multiprocessors., , , and . Computer, 38 (11): 32-38 (2005)Implementing high availability memory with a duplication cache., , , , and . MICRO, page 71-82. IEEE Computer Society, (2008)Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction., , , , and . MICRO, page 81-92. IEEE Computer Society, (2003)Ten Lessons From Three Generations Shaped Google's TPUv4i : Industrial Product., , , , , , , , , and 6 other author(s). ISCA, page 1-14. IEEE, (2021)Rethinking DRAM design and organization for energy-constrained multi-cores., , , , , and . ISCA, page 175-186. ACM, (2010)LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems., , , , and . ISCA, page 285-296. IEEE Computer Society, (2012)