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DeMOR: decentralized model order reduction of linear networks with massive ports., , , , and . DAC, page 409-414. ACM, (2008)SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits., , , and . DAC, page 158-161. IEEE, (2007)GPU-accelerated parallel Monte Carlo analysis of analog circuits by hierarchical graph-based solver., and . ASP-DAC, page 719-724. IEEE, (2015)Compact nonlinear thermal modeling of packaged integrated systems., , , , and . ASP-DAC, page 157-162. IEEE, (2013)Symbolic nodal analysis of analog integrated circuits using pathological elements., , and . NEWCAS, page 161-164. IEEE, (2012)Lifetime optimization for real-time embedded systems considering electromigration effects., , , , , and . ICCAD, page 434-439. IEEE, (2014)Partitioning-based decoupling capacitor budgeting via sequence of linear programming., , , and . Integr., 40 (4): 516-524 (2007)EM-GAN: Fast Stress Analysis for Multi-Segment Interconnect Using Generative Adversarial Networks., , , and . CoRR, (2020)Fast Electromigration Immortality Analysis for Multisegment Copper Interconnect Wires., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (12): 3137-3150 (2018)A Fast Leakage-Aware Full-Chip Transient Thermal Estimation Method., , , , , , , and . IEEE Trans. Computers, 67 (5): 617-630 (2018)